Inserat online seit: 16 Juni
Aufgaben der Stelle
PpJoin the CERN Experimental Physics Department and help develop next-generation detector technologies for future High Energy Physics experiments. As part of the High Speed Links programme, you will contribute to radiation‑tolerant optical communication systems that combine custom ASICs, silicon photonics, optical modules, and FPGA platforms to enable reliable high‑speed data transmission in extreme environments. We are seeking an Analogue/Custom IC Design Engineer to design and validate advanced communication ASICs and high‑speed CMOS circuits for particle physics detectors. The role involves taking cutting‑edge technologies from prototype development through to full system demonstrators. /p h3Your responsibilities /h3 ul liStudy and define architectures for analogue and mixed‑signal circuits that enable high‑speed communication systems using silicon photonics. /li liDesign and verify CMOS circuit blocks such as clock and data recovery (CDR) circuits, high speed clock distribution networks and high‑speed analogue‑to‑digital converters (ADCs). /li liPerform laboratory testing, characterisation, and validation of circuits. /li liCarry out radiation qualification (single‑event effects and total ionising dose) of manufactured devices. /li /ul h3Your profile /h3 ul liA strong background in digital and analogue electronics, ideally in an IC design environment. /li liFamiliarity with clock generation and distribution, including fundamentals of DLL, PLL, and CDR circuits. /li liThe ability to solve engineering problems using a variety of analysis and simulation methods. /li liHands‑on experience in the design, testing and debugging of electronic circuits. /li liA strong team player who can also work independently. /li /ul h3Skills /h3 ul liDesign, simulation and layout of CMOS integrated circuits using Cadence Virtuoso. /li liWorking knowledge of physical verification flows (DRC, LVS, PEX) using Siemens Calibre or Cadence PVS. /li liKnowledge of at least one of the following: optical receiver circuits, high data rate drivers (wireline, laser and/or external modulators), PLL and CDR design, TIA, ADC and DAC design, control systems. /li liWorking knowledge of at least one programming, scripting, or data analysis language (e.g., Python, Bash, MATLAB). /li liExperience with electromagnetics (EM) simulation tools (e.g., Ansys HFSS, Simulia CST) is considered a plus. /li liSpoken and written English, with a commitment to learn French. /li /ul h3Eligibility criteria /h3 ul liYou are a national of a CERN Member or Associate Member State. /li liYou have a professional background in Electronics Engineering (or a related field) and have either: ul liA Master’s degree with 2 to 6 years of post‑graduation professional experience. /li liPhD with no more than 3 years of post‑graduation professional experience. /li /ul /li liYou have never had a CERN fellow or graduate contract before. /li /ul pJob closing date: b at 23:59 CEST. /b /p pContract duration: 24 months, with a possible extension up to 36 months maximum. /p pWorking hours: 40 hours per week /p pJob flexibility: Hybrid /p pTarget start date: 01-August-2026 /p pThis position involves: /p ul liWork during nights, Sundays and official holidays. /li liWork in Radiation Areas. /li /ul pJob reference: EP-ESE-ME- -GRAP /p pField of work: Electrical or Electronics Engineering /p pBenchmark job: - Electronics Engineer /p h3Global Benefits /h3 ul liA monthly stipend between Swiss Francs per month (tax free) depending on your degree. /li li30 days of paid leave per year plus 2 weeks annual closure. /li liCoverage by CERN’s comprehensive health insurance scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund. /li liFamily, child and infant monthly allowances depending on your individual circumstances. /li liA relocation package (installation grant and travel expenses) depending on your individual circumstances. /li liPossibility to extend your contract up to 36 months. /li liOn‑the‑job and formal training including language classes. /li /ul /p #J-18808-Ljbffr