I am recruiting for an Analog Layout Engineer to join my client’s team, working on high‑speed solutions in advanced semiconductor technology nodes. This role can be based in Switzerland and offers a chance to work on cutting‑edge analog circuits.
Location: Lausanne, Vaud, Switzerland.
Responsibilities
* Perform custom layout and verification of analog circuits, blocks and IP for multi‑Gigabit serial data‑link transceivers or memory interfaces.
* Design and verify very high‑speed analog circuits including amplifiers, oscillators, phase‑locked loops, delay‑locked loops, regulators, buffers and filters.
* Collaborate with the design team to implement solutions that meet specifications.
* Support IP and chip‑level integration and delivery.
* Interact with customers regarding requirements and IP handover.
* Work with flip‑chip package technologies.
Experience
* Proven experience in custom analog layout of circuits and blocks for high‑speed serial data‑link or high‑frequency/RF applications.
* Expertise in layout techniques for high‑speed/frequency circuits, including matching, parasitic minimisation, power grids and ESD.
* Knowledge of modern semiconductor processes such as 28 nm, 14 / 16 nm and 7 nm.
* Proficient with EDA tools including Cadence Virtuoso, Spectre/HSpice, Calibre/PVS, parasitic extraction and modelling, EM, IR drop and ESD verification.
Senior Level
Mid‑Senior level.
Employment Type
Full‑time.
Job Function
Engineering and Information Technology.
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