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Principal digital ic design engineer - digital compute team

Bern
Onsemi
Design
Inserat online seit: 26 Oktober
Beschreibung

Principal Digital IC Design Engineer - Digital Compute Team

Job Description

Principal Digital IC Design Engineer - Digital Compute Team About Us At

onsemi, we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our group develops MCU and DSP systems as well as hardware accelerators that are used in a large variety of different products and markets. The Role We are looking to expand our team with a

Principal Digital IC Design Engineer with experience in the development of embedded MCU/DSP systems. You will develop and benchmark such systems using various types of processor cores and consult the product integration teams during the integration of these solutions into semiconductor products. As senior engineer you will mentor younger engineers and drive project activities. Why Join Us We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. You will be entitled to 25 vacation days per year, and you will have a very competitive benefit package. You will be able to build up a career in a successful international company, and you can participate in interesting international projects. Our commitment to you As part of the onsemi team, you will have an opportunity to transform your tomorrow and operate in a diverse, inclusive, and socially responsible environment. If you’re passionate about shaping a better future, join us and define your future! Responsibilities

What You’ll Do Architect, specify, implement, simulate, and benchmark MCU and DSP systems as well as hardware accelerators Consult the product integration teams in the definition, the integration and use of these systems Participate to the verification and FPGA prototyping of these systems Coordinate the SDK development with the software team Lead project activities Contribute to design methodology and design flow improvements Qualifications

What You’ll Need Minimum BS/MS in Electrical Engineering or related technical field At least 10 years of relevant work experience in semiconductor product development including engineering leadership Experience with embedded CPUs (e.g. ARM Cortex, DSP), AMBA bus protocols (AHB/APB) RTL design of digital IP blocks and systems in Verilog/SystemVerilog Technical document writing Excellent English written and verbal communication skills. Eligibility to work in Switzerland What Else You May Bring Experience in some of the following areas is a plus: Project/task leadership Design of CPU/MCU (sub)systems, SystemRDL or IP-XACT Programming in Python for automation and in C/C++ for embedded software Design intent (timing constraints/SDC, power intent/UPF) Design of accelerators and signal processing components RTL to GDS flow, including logic synthesis, place-and-route, STA, power analysis Advanced digital verification methodology (e.g. UVM) Knowledge of French About Us

onsemi

(Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here: We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Job Info

Job Identification 2503235 Job Category Engineering Posting Date 06/09/2025, 05:35 AM Degree Level Masters Job Schedule Full time Locations Champs-Montants 12a, Marin-Epagnier, 2074, CH

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