We are looking to expand our team with a Senior Mixed-Signal IC Design Engineer. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design of complex mixed-signal IPs and have familiarity with analog blocks such as DACs, ADCs, PLL and wireless interface etc.
Why Join Us
We create a diverse set of world‑class products in a friendly and team‑oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. You will be entitled to 25 vacation days per year, and you will have a very competitive benefit package. You will be able to build up a career in a successful international company, and you can participate in interesting international projects.
Responsibilities
What You’ll Do
Define architecture and participate in feasibility studies for new analog/mixed‑signal IP components
Drive design, verification, layout, and bench evaluation of state‑of‑the‑art CMOS and SOI designs which can be reused across different market segments.
Lead small teams on sub‑projects and contribute to SoC integration
Propose innovative solutions to meet customer and product needs
Collaborate on DFT strategies and document designs thoroughly
Partner with test, product, and applications engineering to ensure successful production release
Documentation: including architecture and circuit descriptions, testing procedures, and safety mechanisms.
Qualifications
What You’ll Need
Minimum BS/MS in Electrical Engineering or related technical field
Minimum 5 years in mixed‑signal design
RTL design of digital IP blocks and systems in Verilog/SystemVerilog
A thorough understanding of semiconductor physics and IC processes.
Prior exposure to analog design in deep‑submicron processes (65nm or below)
Creativity, dynamism, reliability and team spirit
Excellent English written and verbal communication skills
Eligibility to work in Switzerland
What Else You May Bring
Experience in some of the following areas is a plus:
Project/task leadership
Capacity to think at the system level
Knowledge Verilog‑A or VHDL‑AMS is a plus.
Design of accelerators and signal processing components
Experience in low power
RTL to GDS flow, including logic synthesis, place‑and‑route, STA, power analysis
Advanced digital verification methodology (e.g. UVM)
Previous experience in one of the following fields: ADC, DAC, PLL
Knowledge in Functional Safety
Knowledge of French
About Us
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end‑markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
We are committed to sourcing, attracting, and hiring high‑performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
Job Info
Job Identification 2504400
Job Category Engineering
Posting Date 01/07/2026, 12:31 PM
Degree Level Masters
Job Schedule Full time
#J-18808-Ljbffr