A semiconductor company is seeking a resourceful DFT Engineer based in Lausanne, Switzerland. The ideal candidate will have over 5 years of DFT experience, contributing to test pattern development and simulation. Key responsibilities include hierarchical MBIST and scan insertion, ATPG pattern generation, and collaborating with engineering teams. This is a great opportunity to join a high-tech scale-up focused on innovative chip-link solutions. If you're passionate about pushing limits, we'd love to hear from you.
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