Senior Analog IC Layout Engineer with finFET experienceSalary: Very Attractive RateLocation: N/AContractQualifications:Minimum 7 years' experience in Analog IC LayoutExperience working on high-speed layoutsExperience working on speeds up to or exceeding 25 Gb/secExperience with finFET technology, specifically TSMC down to 16nmProficiency with Cadence toolsAdditional Requirements:Experience as a Senior Analog Layout Engineer or similar roleChipright – Your Partner in finding your next job – Call us at +353 91 444168 or email annette.burke@chipright.comSenior Analog & AMS Recruitment Specialist
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