TalentCloud Group Recruitment is seeking a Lead ASIC Physical Design Engineer in Zürich to lead backend implementation efforts for next-generation compute technology at a cutting-edge semiconductor company. This senior role involves defining the RTL-to-GDSII flow, mentoring a design team, and ensuring clean sign-off on complex digital designs. Candidates should have over 10 years of experience in ASIC design, a proven track record with tapeouts, and expertise in Synopsys or Cadence toolchains. Enjoy a challenging role that emphasizes technical leadership and team building.
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