Ph3About Us /h3pAxelera AI is a deep‑tech startup building the next‑generation AI platform to aid humanity and improve the world. In just four years we raised $370 million and built a world‑class team of 220+ employees, including 49+ PhDs with 40,000+ citations, distributed across 18 countries and offices in Belgium, France, Switzerland, Italy, the UK, and the Netherlands. /ppWe launched the Metis AI Platform, achieving 3–5x efficiency gains, and maintain a business pipeline exceeding $100 million. Our commitment to innovation has established us as a global industry pioneer. /ph3Position Overview /h3pAs a bLogical Design Engineer /b, you will join a team responsible for micro‑architecture, implementation, and execution of in‑house AI products. Your role is critical for achieving high quality and performance while driving continuous innovation in design and design flow. /ph3Key Responsibilities /h3ulliCollaborate with cross‑functional teams to clarify intricate design specifications and requirements. /liliArchitect and implement advanced micro‑architectures from high‑level specifications for silicon components, meeting performance, power, and area (PPA) metrics. /liliUse industry‑standard design tools and methodologies to build and optimize digital logic circuits. /liliConduct block and system‑level RTL coding, ensuring optimal PPA. /liliIntegrate various IPs/Sub‑IPs into the top‑level SoC. /liliPerform static checks (lint, CDC, equivalence checks) to enhance RTL quality. /liliAutomate tasks using scripting for efficiency gains. /liliUndertake comprehensive functional verification and collaborate with verification engineers to ensure correctness. /liliParticipate in design reviews, contributing technical expertise to improve design quality. /liliCollaborate with physical design engineers on DFM and DFT considerations. /li /ulh3Qualifications / Skills /h3h3Education /h3pA degree in electronics engineering, electrical engineering, computer science, or a related discipline. /ph3Experience /h3pMinimum 5 years of silicon logical design experience, proven in RTL coding and synthesis, digital design, SoC, and integration of third‑party IPs (PCIe, LPDDR), with fluency in Verilog. /ph3Expertise /h3pMastery of EDA tools for design and verification. Deep understanding of digital design principles, including clock domain crossing, low‑power design, and timing closure. /ph3Scripting /h3pProficiency in scripting languages such as Python, shell, or Tcl for automation. /ph3Collaboration / Team Player /h3pDemonstrated ability to work closely with architecture, verification, physical design, and software teams to ensure comprehensive coverage. /ph3Problem Solving /h3pStrong analytical and problem‑solving skills. /ph3Communication /h3pExcellent written and verbal communication skills in English. Comfortable working with a team spread across 15 countries. /ph3Location /h3ulliWork from one of our offices (Leuven, Brussels, Amsterdam, Eindhoven, Zurich, Florence, Milan, Bristol) if you are already based nearby. /liliWork fully remotely from any European country (incl. the UK). /liliRelocate to Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven). /li /ulh3What We Offer /h3pOpportunity to shape and thrive in a fast‑growing, international organization. Compensation includes a pension plan, extensive employee insurances, and the option to receive company shares. An open culture that supports creativity, continual innovation, collaborative ownership, and freedom with responsibility. /ppAxelera AI embraces equal opportunity and values diversity. We welcome applicants from all backgrounds to join us in shaping the future of AI. /p /p #J-18808-Ljbffr