A leading technology firm located in Lausanne is seeking a Design Verification Engineer to develop design verification methodologies and verify complex designs in AI and semiconductor innovation. Ideal candidates will have over 5 years of experience in the semiconductor industry and a proven track record in FPGA or ASIC design verification. The role offers pre-IPO stock options and the opportunity to work on cutting-edge technologies, contributing to significant advancements in the field. #J-18808-Ljbffr