Job Description
In this role, you will contribute to the development of next-generation readout and control systems for the LHCb experiment, focusing on FPGA gateware and low-level embedded software in both bare-metal and Linux environments. You will participate in the design, implementation and testing of scalable and high-performance solutions that interface with detector electronics and data acquisition systems.
Through this work, you will help evolve CERN's distributed control infrastructure to ensure reliable, efficient and safe operation of upgraded detector systems.
Your responsibilities:
Collaborate with hardware, firmware (FPGA), embedded software and control system engineers to define system requirements and interface specifications.
Analyse current and future detector control workloads to define realistic performance benchmarks.
Define and implement solutions that distribute control functions across FPGA logic and embedded processors to optimise performance, reliability and maintainability.
Test, validate and refine prototypes in laboratory environments.
Prepare clear technical documentation and guidelines to support developers and researchers integrating the solutions into their experiments.
Your profile:
Knowledge in developing, simulating and validating FPGA gateware.
Experience in writing, profiling and optimising C code.
Knowledge in hardware/software specification and co-design.
Skills:
VHDL 2008 (VUnit and UVVM experience is a plus).
C for embedded applications and Linux device drivers (Rust is a plus).
Intel Quartus or AMD Vivado toolchains (both is a plus).
RISC-V instruction set architecture (experience with FPGA softcores like PicoRV32, Nios® V, Microblaze™ V is a p