We are partnering with a cutting-edge semiconductor company in Zürich who are building next-generation compute technology and are now looking for a Lead ASIC Physical Design Engineer to own and scale their backend implementation capability.
This is a senior, hands‑on leadership role where you will define the RTL-to-GDSII strategy and build the team that executes it.
If you enjoy taking complex digital designs from synthesis all the way to clean sign‑off — and you’re confident leading the toughest implementation challenges yourself — this could be for you.
You will combine deep technical execution with methodology ownership and team leadership.
Expect to:
* Define and maintain a robust RTL-to-GDSII implementation flow
* Own synthesis, floorplanning, partitioning, P&R, CTS, routing & closure
* Drive MCMM timing closure, power optimization & ECO strategy
* Establish constraint methodology, library strategy & sign‑off standards
* Lead low‑power implementation (UPF/CPF, isolation, retention, level shifting)
* Collaborate closely with RTL, custom circuit & layout teams
* Ensure clean DRC/LVS, IR/EM and reliability closure
* Industrialize the backend flow with automation (Tcl/Python), CI & reproducible builds
* Build and mentor a growing physical design team
What You’ll Bring
* 10+ years in ASIC physical design
* 2+ successful tapeouts as implementation owner (block or subsystem level)
* Deep expertise in either a Synopsys or Cadence toolchain
* Proven floorplanning & hierarchical integration capability
* Hands‑on experience with IR/EM analysis & power grid planning
* Solid understanding of multi‑voltage / power‑gated designs
* Experience scripting for automation (Tcl, Python)
* Confidence making major implementation decisions independently
* DFT exposure (scan, MBIST, test timing awareness)
* Experience at advanced FinFET nodes (≤7nm)
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* Knowledge of EUV / multi‑patterning considerations
* Familiarity with reliability‑driven or safety‑critical design standards
* Package / board‑level awareness (power integrity, bump planning, thermal)
This role suits someone who:
* Enjoys owning implementation end‑to‑end
* Can architect a backend flow — not just execute one
* Likes solving timing & power challenges at scale
* Wants to build and shape a backend team
* Thrives in technically demanding environments
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