Dft & postsilicon validation

PstrongAt TechBiz Global /strong, we are providing recruitment service to our TOP clients from our portfolio. We are currently looking for a /ppstrongDFT Post-Silicon Validation /strong to join one of our clients' team /ppAre you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in package? We need you! As a Senior DFT and Post-Silicon Lead, you will own the DFT implementation process, ensuring seamless integration with test and post-silicon validation teams. You will work with cutting-edge technology, collaborating closely with external IP providers, EDA vendors, and internal teams to deliver high-quality, high-performance SoCs or SiPs for mass production. /p pstrongKey Responsibilities /strong /pullipLeadership Team Management /p /lilipLead and mentor the DFT and Post-Silicon engineering teams to drive innovation and efficiency. /p /lilipProvide technical direction, ensuring alignment with organizational goals. /p /lilipFoster a culture of continuous improvement and collaboration. /p /lilipDFT Strategy Execution /p /lilipDefine and implement DFT architectures to improve testability, debug capabilities, and manufacturability. /p /lilipEnsure proper insertion of DFT features such as scan chains, BIST (Built-In Self-Test), and JTAG interfaces. /p /lilipOptimize DFT methodologies to minimize test time, reduce cost, and improve quality/yield. /p /lilipTest Development Implementation /p /lilipDevelop and implement test plans and test strategies at silicon, package, and system levels. /p /lilipDefine and develop automated test solutions for production and characterization. /p /lilipEnsure test coverage for all product development stages, from pre-silicon to mass production. /p /lilipGuarantee high yield on the final solution while considering chiplet complexities. /p /lilipCross-Functional Collaboration /p /lilipWork closely with design, validation, packaging, and operations teams to ensure seamless integration of testing and manufacturability. /p /lilipCollaborate with product management to ensure alignment with customer requirements and timelines. /p /lilipProcess Improvement Innovation /p /lilipContinuously explore and implement new DFT methodologies and manufacturing processes. /p /lilipLead initiatives for cost reduction, efficiency improvements, and quality enhancements in test and production. /p /li /ul pstrongReporting Structure /strong /ppReports to: Physical Implementation Team Manager /ppReceives reports from: DFT and Post-Silicon team members /pbr /br /ullipBachelor’s, Master’s, or PhD in Computer Science, Electrical Engineering, or a related field. /p /lilipProven experience with multiple tape-outs of high-performance SoCs or SiPs for mass production. /p /lilipStrong background in post-silicon test optimization and yield analysis. /p /lilipExperience in defining and implementing test strategies for high-volume production. /p /lilipProficiency in RTL and testbench development using SystemVerilog and Verilog. /p /lilipStrong scripting skills (Shell, Tcl, Python3). /p /lilipHands-on experience with Tessent and SSN methods integrated with leading EDA design flows for advanced technology nodes is a plus. /p /li /ul