The Role
We are looking to expand our team with a Senior Digital IC Verification Engineer. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design of complex mix-signal IPs and have familiarity with analog blocks such as DACs, ADCs, PLL and wireless interface etc.
What You’ll Do
1. Define the verification strategy and the detailed verification plans for blocks and systems
2. Coordinate/lead the verification activities in the project teams
3. Develop SystemVerilog/UVM environments for blocks and top-level SoCs
4. Debug functional errors in RTL
5. Participate to verification methodology improvement activities
What You’ll Need
6. Minimum BS/MS in Electrical Engineering or related technical field
7. Minimum 3 years of digital verification experience
8. Solid understanding of verification best practices such as verification planning, requirements tracking, and functional coverage
9. In-depth knowledge and some years of proven experience in state-of-the-art verification methodologies (. UVM), constrained random driven verification, assertion based verification, test environment architecture & creation, regression management, coverage collection
10. Excellent English written and verbal communication skills
11. Eligibility to work in Switzerland
What Else You May Bring
12. Experience with:
13. Project/task leadership
14. Verification of signal processing components
15. 3rd party verification IP deployment
16. Programming skills – Python, Tcl, embedded software
17. Knowledge of French