A leading semiconductor company in Switzerland is seeking a Mid-Senior level Custom Layout Engineer to manage the design of custom layouts for mixed-signal and SRAM IP. Applicants should possess over 5 years of experience, demonstrating strong ownership through the design process from floorplan to sign-off, with expertise in sub-28 nm nodes. Responsibilities include collaborating with design teams to enhance the power-aware layout design and automating tasks with scripting. This full-time role offers a chance to lead innovative projects in semiconductor manufacturing. #J-18808-Ljbffr