A semiconductor company in Zürich is seeking a Mid-Senior Level Custom Layout Engineer to oversee transistor-level and block-level custom layout for mixed-signal and SRAM IP. The ideal candidate has over 5 years of experience in custom layout and a strong grasp of analog layout techniques. Responsibilities include planning and implementing layouts, collaborating with design teams, and automating layout documentation processes. This full-time position offers a chance to work on cutting-edge semiconductor technologies. #J-18808-Ljbffr