Role: Principal Design Engineerbr/ Location: Switzerland br/ br/ About the role:br/ br/ You must have demonstrated success in digital design verification/infrastructure development for digital FPGAs/ASICs.br/ br/ Other key skills include technical/project leadership, documentation, RTL design knowledge, and backend flow and tools knowledge. The position requires both technical and leadership skills, while working closely with multi-disciplinary groups to drive design key aspects of ASIC/pwr mgmt. br/ br/ Candidate will be lead designer, support verification, and be technical focus on one or more device and/or sections. Candidate will also support pre/post-silicon design validation and support Design/ATE/Application Systems group. br/ br/ br/ Products working on:br/ br/ switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, notebooks, cell phones, telecom, fiber optics, digital camera, automobile and network equipment.br/ br/ br/ Responsibilities:br/ br/ - Support develop the chip/digital level architecture and functional blocksbr/ - Provide technical documentation with specifications, block diagrams, and requirements to stakeholders.br/ - Collaborate work with departments/stakeholders including for architectures, requirements, and tradeoffs, including Digital/Analog Design, Application/Test Engineering, Reliability/Operations to resolve design, application, or test issues.br/ - Develop system and chip level simulation verification techniques and methodology.br/ - Digital Design (RTL design): ASIC or FPGA from concept to implementation br/ - Digital Verification: Development test plans, test benches and automated test casesbr/ - Knowledge and/or responsibility in synthesis, timing closure, and formal verification.br/ - Create scripting to support design and verification automationbr/ - Estimate and manage time/tasks completion to target schedulebr/ br/ br/ Qualifications:br/ br/ - PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework. br/ - 10+ years experience in design plus verification of ASIC or FPGAbr/ - Broad Strong knowledge of ASIC development process and digital design techniques.br/ - Proficient in standard DV languages (Verilog, SystemVerilog, UVM) and automated regression testcase development, and reporting/tracking coverage metrics.br/ - Experience with programming, scripting and automation languages(C/C++, shell, Perl, TCL, Python, etc). br/ - Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, PR, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc. br/ - Excellent Knowledge Use of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc.br/ - Good written/verbal communication skills and strong team work/collaboration. br/ br/ br/ Experience with the following is highly desired:br/ br/ - Knowledge of power management architectures/applicationsbr/ - I2C, I3C, SPI, USB, PMBUS, I2S, CANOpen, EtherCATbr/ - GITLab or equiv version controlbr/ - Embedded MCU(ARM) designs and/or firmware developmentbr/ - Previous experience in signal processing and sensorsbr/ br/ br/ If you are interested in this role please