Postulation en ligne uniquement : https://kandou.bamboohr.com/careers/318 Merci de mentionner sous source : ORP At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption. Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale. Kandou’s architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future. Job Title: Mixed Signal Verification Engineer Key Responsibilities: Verification plan tasks in analog/mixed signal environment related to high speed SerDes designs Debug and flag bugs with design team Enhance and develop new methodologies with the verification team and EDA vendors Document and track verification plan tasks, bug findings and methodology work Skills: Good scripting techniques Good understanding of fabrication process, process corners, simulation, and verification setup Very good knowledge on electrical and discrete test benches / solvers in terms of run time optimization Very good knowledge about simulation tools and debugging techniques Good understanding of revision control Good communication and reporting skills Experience: At least 10 years of experience on digital/mixed signal/analog verification: test bench design, connect modules, design electrical/discrete partitioning, UDN, wreal, compile and elaboration debug Experience in behavioral modelling, basic knowledge of analog building blocks Experience with simulator: fast analog solver e.g., Cadence APS, SpectreX / digital solver e.g., Cadence Xcelium Experience in constrained random testbench development Experience in System Verilog Assertions Experience with Cadence Ocean Script Experience with Cadence Virtuoso Framework: Schematic editor, Assembler, AMS Experience on high-speed communication systems such as SerDes would be a plus Good digital verification background with some Specman/SV UVM exposure and/or analog verification background Education: Graduated in Electrical Engineering If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It ! Visit us at www.kandou.ai and https://www.linkedin.com/company/kandou-ai/